Articles

Why Separation Science is the New Gatekeeper of Semiconductor R&D

By leveraging inline separation columns, kinetic cleaning, and AI-driven drift detection, photonic engineers are pushing analytical limits from ppb to ppt to safeguard the next generation of 6G devices.
Written byShiama Thiageswaran
InterviewingAlireza Loghmany and Michael Davison
Visual representation of compound semiconductor fabrication with layered designs.

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In the high-stakes environment of compound semiconductor fabrication, the margin for error is measured at the atomic level. Unlike traditional silicon semiconductors used in standard computer processors, compound semiconductors, such as indium phosphide (InP), are the engine of the fiber-optic and wireless revolution. These materials are essential for creating the lasers, detectors, and modulators that power high-speed artificial intelligence (AI) data centers, light detection and ranging (LiDAR) for autonomous vehicles, and the emerging 6G telecommunications infrastructure.

At the Canadian Photonics Fabrication Research Centre (CPFC), the effectiveness of analytical chemistry is measured not just in purity percentages, but in gigahertz. Alireza Loghmany, engineer at the CPFC, warns that as the industry pivots toward 6G frequencies exceeding 100 gigahertz (GHz), a single monolayer of oxygen or a few parts-per-billion (ppb) of a transition metal can result in "total device failure."

Separation science, according to Loghmany and his CPFC colleague Michael Davison, has moved beyond simple downstream validation. It is now a fully integrated, real-time gatekeeper essential for transitioning prototypes into high-yield, automated ("lights out") manufacturing processes.

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The Electron Trap: Why Specificity Matters

In photonic engineering, specific contaminants act as functional "traps" that disrupt electronic performance. "Separation science is a critical filter that ensures high-speed performance by removing atomic-level impurities," Loghmany explains. In InP manufacturing, his team monitors three primary contaminant categories that can derail a device:

  1. Transition metals (Fe, Cu, Cr): These create electron traps within the material lattice, effectively capturing the charge carriers required for high-speed signal transmission. Concentration thresholds are razor-thin; anything above 1–10 ppb results in significant signal degradation.

  2. Group 6 elements (S, Se, Te): These are persistent contaminants that must be maintained below 20 to 50 ppb. Loghmany notes that these typically originate from the phosphorus precursor, making the phosphorus supply chain a primary focal point for separation analysts.

  3. Atmospheric contaminants (O, C): Typically introduced during precursor changes, these are monitored at densities of 1016 atoms/cm³.

As research moves toward 6G, requirements are shifting by two orders of magnitude, moving from the current industry standard of 1017 atoms/cm³ down to 1015 atoms/cm³.

Analytical Interlocks: The MOCVD Workflow

The CPFC translates theoretical designs into physical chips using metal-organic chemical vapor deposition (MOCVD). In this process, ultra-pure gases (precursors) are introduced into a reactor where they react and deposit thin layers of crystalline material onto a wafer. Because these precursors are the raw building blocks of the chip, any impurity in the gas stream is instantly baked into the device.

Contamination risk is highest at the "hook-up" stage, when a gas cylinder is opened or connected to the manifold. To mitigate this, the facility utilizes extra separation columns installed directly before the reactor. This "point-of-use" purification ensures that any impurities introduced during cylinder changes never reach the wafer.

Decision-making is driven by a hierarchy of analytical data. Before a production run begins, engineers analyze data from previous runs, conditioning runs, and calibration cycles. "Our sensors must meet a hard interlock," Loghmany says. "If the moisture or oxygen level is even 1 ppb above the threshold, the MOCVD software physically prevents the run from starting."

The Purification Paradox and the Silicon Gap

One of the most significant challenges facing semiconductor analysts today is that purification is outstripping detection. "The problem is that we currently do not have the equipment to support the level to which the material has been purified," Loghmany asserts.

This verification gap is partly due to the industry's maturity. Davison observes that the compound semiconductor industry, particularly photonic chips, is lagging behind the traditional silicon-based industry by several generations. "They've been working on the purities and control systems for semiconductor materials on the silicon side for decades longer than our industry," Davison explains.

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While photonics engineers are the beneficiaries of decades of silicon-side research, Davison points out that they are still playing catch-up to manage background noise at the parts-per-trillion (ppt) frontier. Loghmany points to two persistent root causes of this noise:

  • The memory effect: Residual contamination from previous fabrication cycles that "clings" to hardware surfaces.
  • Container contamination: Trace impurities leached from the high-purity cylinders and manifolds designed to transport precursors.

To combat these, Loghmany employs kinetic cleaning. After installing a new precursor, the engineering team heats the delivery pipes to "shake the molecules off the walls," before executing an extensive purge cycle with ultra-high-purity nitrogen.

Beyond Hardware: The AI Shift

Both Davison and Loghmany agree that the industry has reached the physical hardware limits of detection. The future of separation science in semiconductor research and development (R&D) likely lies in AI-driven drift detection.

Currently, maintenance and sensor calibration are often based on fixed operation windows (for example, a 10-hour service cycle) or waiting for a hardware failure. However, the CPFC is moving toward AI to monitor statistical process control (SPC) drift in real time.

"The switch will be from purely monitoring the lifetime of a sensor to an AI-driven, micro-electro-mechanical systems (MEMS)-based detection system," says Loghmany. By detecting a subtle drift early in the process—well before it hits a failure threshold—engineers can intervene to protect the yield, which is essential for scaling from R&D to full production.

The Secret Sauce of Fabrication

As photonic chips become the foundation for AI infrastructure and 6G communications, a lab’s success is defined by its ability to silo and protect intellectual property while maintaining predictably pure material flows. Analytical science has become the enabling infrastructure of the digital age, moving beyond a peripheral support function. It is now the key factor determining the manufacturability of semiconductor technologies.

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Published In

Digital Issue 9 Thumbnail
July 2026

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Meet the Author(s):

Interviewing

  • Alireza Loghmany

    Dr. Alireza Loghmany serves as the Director of R&D at the Canadian Photonics Fabrication Centre (CPFC), where he acts as the lead technical authority in the commercialization of next- generation photonics chip technologies. Since joining the National Research Council Canada in 2014, he has progressed through senior leadership positions, including Section Head and Engineering Team Lead, built on a foundation of deep expertise in microfabrication and device physics. Dr. Loghmany now orchestrates multidisciplinary teams and strategic technology roadmaps to solve complex photonics challenges while ensuring the precise execution of the CPFC’s industrial client portfolio. Alireza received his Master's and PhD in Electrical and Computer Engineering from Concordia University in Montreal, where his research was mainly focused on design, microfabrication, and characterization of Gallium Nitride-based High Electron Mobility Transistors (HEMTs).

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  • Michael Davison

    Michael Davison is the Director of Business Development for the Canadian Photonics Fabrication Centre. He started his career at the NRC in 2013 as a Business Development Officer and then promoted to director of BD in 2021. Michael graduated from the Carleton University in 2000 with a Bachelor of Industrial Design and began his career at JDS Uniphase (Lumentum) in the R&D telecom group, followed by relocating to California’s Silicon Valley and working for photonics-based R&D companies pioneering CWDM devices into metro-access markets (Tsunami Optics & Stratos Lightwave). During these years he began in product development engineering roles and grew into applications engineering and product management functions. Upon returning to Canada, he held sales executive roles at Bell Canada large enterprise optical networks division, and March Networks IP surveillance and data analytics solutions. He is a seasoned professional with solid track record in business development, sales, marketing and technology leadership roles.

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